onerror {resume}
quietly WaveActivateNextPane {} 0
add wave -noupdate -radix hexadecimal /tb_cpu/halt
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/cpu_c/nReset
add wave -noupdate -radix hexadecimal /tb_cpu/dipIn
add wave -noupdate -divider Top-Level
add wave -noupdate -divider DCACHE
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/cntrl_c/halt
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/cntrl_c/halt_out
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/cntrl_c/dmemREN
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/cntrl_c/dmemWEN
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/cntrl_c/dmemAddr
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/cntrl_c/dmemWriteData
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/cntrl_c/dmemReadData
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/cntrl_c/dmemWait
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/cntrl_c/arbREN
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/cntrl_c/arbWEN
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/cntrl_c/arbWait
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/cntrl_c/arbAddr
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/cntrl_c/arbReadData
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/cntrl_c/arbWriteData
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/cntrl_c/s1_tag
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/cntrl_c/s2_tag
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/cntrl_c/s1_tagOut
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/cntrl_c/s2_tagOut
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/cntrl_c/s1_index
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/cntrl_c/s2_index
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/cntrl_c/s1_wdat
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/cntrl_c/s2_wdat
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/cntrl_c/s1_wDirty
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/cntrl_c/s2_wDirty
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/cntrl_c/s1_datWEN
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/cntrl_c/s2_datWEN
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/cntrl_c/s1_rdat
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/cntrl_c/s2_rdat
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/cntrl_c/s1_rHit
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/cntrl_c/s2_rHit
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/cntrl_c/s1_rDirty
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/cntrl_c/s2_rDirty
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/cntrl_c/s1_rRecent
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/cntrl_c/s2_rRecent
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/cntrl_c/s1_wRecent
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/cntrl_c/s2_wRecent
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/cntrl_c/s1_recentWEN
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/cntrl_c/s2_recentWEN
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/cntrl_c/currState
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/cntrl_c/nextState
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/cntrl_c/t_tag
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/cntrl_c/t_index
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/cntrl_c/halt_index
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/cntrl_c/halt_indexNext
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/cntrl_c/t_wordSelect
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/cntrl_c/t_chosenSet
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/cntrl_c/t_chosenData
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/cntrl_c/t_chosenWord
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/cntrl_c/t_chosenHit
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/cntrl_c/t_readData
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/cntrl_c/t_readDataNext
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/cntrl_c/s1_priority
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/cntrl_c/s2_priority
add wave -noupdate -divider S1
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/s1_c/tag_in
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/s1_c/data_in
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/s1_c/index_in
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/s1_c/recent_in
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/s1_c/dirty_in
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/s1_c/recent_wen
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/s1_c/data_wen
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/s1_c/data_out
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/s1_c/tag_out
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/s1_c/hit
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/s1_c/dirty
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/s1_c/recent
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/s1_c/validd1
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/s1_c/validd2
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/s1_c/ram1
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/s1_c/ram2
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/s1_c/tagg1
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/s1_c/tagg2
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/s1_c/recent1
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/s1_c/recent2
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/s1_c/dirty1
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/s1_c/dirty2
add wave -noupdate -divider S2
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/s2_c/tag_in
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/s2_c/data_in
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/s2_c/index_in
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/s2_c/recent_in
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/s2_c/dirty_in
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/s2_c/recent_wen
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/s2_c/data_wen
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/s2_c/data_out
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/s2_c/tag_out
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/s2_c/hit
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/s2_c/dirty
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/s2_c/recent
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/s2_c/validd1
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/s2_c/validd2
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/s2_c/ram1
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/s2_c/ram2
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/s2_c/tagg1
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/s2_c/tagg2
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/s2_c/recent1
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/s2_c/recent2
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/s2_c/dirty1
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dc_c/s2_c/dirty2
add wave -noupdate -divider CPU
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/cpu_c/clk
add wave -noupdate -radix hexadecimal -childformat {{/tb_cpu/DUT/theCPU/theCPU/cpu_c/nPC.fetch -radix hexadecimal} {/tb_cpu/DUT/theCPU/theCPU/cpu_c/nPC.id -radix hexadecimal} {/tb_cpu/DUT/theCPU/theCPU/cpu_c/nPC.exec -radix hexadecimal} {/tb_cpu/DUT/theCPU/theCPU/cpu_c/nPC.mem -radix hexadecimal}} -subitemconfig {/tb_cpu/DUT/theCPU/theCPU/cpu_c/nPC.fetch {-height 16 -radix hexadecimal} /tb_cpu/DUT/theCPU/theCPU/cpu_c/nPC.id {-height 16 -radix hexadecimal} /tb_cpu/DUT/theCPU/theCPU/cpu_c/nPC.exec {-height 16 -radix hexadecimal} /tb_cpu/DUT/theCPU/theCPU/cpu_c/nPC.mem {-height 16 -radix hexadecimal}} /tb_cpu/DUT/theCPU/theCPU/cpu_c/nPC
add wave -noupdate -radix hexadecimal -childformat {{/tb_cpu/DUT/theCPU/theCPU/cpu_c/mem.aluResult -radix hexadecimal} {/tb_cpu/DUT/theCPU/theCPU/cpu_c/mem.dataMem -radix hexadecimal} {/tb_cpu/DUT/theCPU/theCPU/cpu_c/mem.upper -radix hexadecimal} {/tb_cpu/DUT/theCPU/theCPU/cpu_c/mem.rt -radix hexadecimal}} -subitemconfig {/tb_cpu/DUT/theCPU/theCPU/cpu_c/mem.aluResult {-height 16 -radix hexadecimal} /tb_cpu/DUT/theCPU/theCPU/cpu_c/mem.dataMem {-height 16 -radix hexadecimal} /tb_cpu/DUT/theCPU/theCPU/cpu_c/mem.upper {-height 16 -radix hexadecimal} /tb_cpu/DUT/theCPU/theCPU/cpu_c/mem.rt {-height 16 -radix hexadecimal}} /tb_cpu/DUT/theCPU/theCPU/cpu_c/mem
add wave -noupdate -radix hexadecimal -childformat {{/tb_cpu/DUT/theCPU/theCPU/cpu_c/instruction.fetch -radix hexadecimal} {/tb_cpu/DUT/theCPU/theCPU/cpu_c/instruction.decode -radix hexadecimal} {/tb_cpu/DUT/theCPU/theCPU/cpu_c/instruction.id -radix hexadecimal} {/tb_cpu/DUT/theCPU/theCPU/cpu_c/instruction.exec -radix hexadecimal} {/tb_cpu/DUT/theCPU/theCPU/cpu_c/instruction.mem -radix hexadecimal}} -expand -subitemconfig {/tb_cpu/DUT/theCPU/theCPU/cpu_c/instruction.fetch {-height 16 -radix hexadecimal} /tb_cpu/DUT/theCPU/theCPU/cpu_c/instruction.decode {-height 16 -radix hexadecimal} /tb_cpu/DUT/theCPU/theCPU/cpu_c/instruction.id {-height 16 -radix hexadecimal} /tb_cpu/DUT/theCPU/theCPU/cpu_c/instruction.exec {-height 16 -radix hexadecimal} /tb_cpu/DUT/theCPU/theCPU/cpu_c/instruction.mem {-height 16 -radix hexadecimal}} /tb_cpu/DUT/theCPU/theCPU/cpu_c/instruction
add wave -noupdate -radix hexadecimal -childformat {{/tb_cpu/DUT/theCPU/theCPU/cpu_c/hold.pc -radix hexadecimal} {/tb_cpu/DUT/theCPU/theCPU/cpu_c/hold.fetch -radix hexadecimal} {/tb_cpu/DUT/theCPU/theCPU/cpu_c/hold.id -radix hexadecimal} {/tb_cpu/DUT/theCPU/theCPU/cpu_c/hold.exec -radix hexadecimal} {/tb_cpu/DUT/theCPU/theCPU/cpu_c/hold.mem -radix hexadecimal} {/tb_cpu/DUT/theCPU/theCPU/cpu_c/hold.wb -radix hexadecimal}} -expand -subitemconfig {/tb_cpu/DUT/theCPU/theCPU/cpu_c/hold.pc {-height 16 -radix hexadecimal} /tb_cpu/DUT/theCPU/theCPU/cpu_c/hold.fetch {-height 16 -radix hexadecimal} /tb_cpu/DUT/theCPU/theCPU/cpu_c/hold.id {-height 16 -radix hexadecimal} /tb_cpu/DUT/theCPU/theCPU/cpu_c/hold.exec {-height 16 -radix hexadecimal} /tb_cpu/DUT/theCPU/theCPU/cpu_c/hold.mem {-height 16 -radix hexadecimal} /tb_cpu/DUT/theCPU/theCPU/cpu_c/hold.wb {-height 16 -radix hexadecimal}} /tb_cpu/DUT/theCPU/theCPU/cpu_c/hold
add wave -noupdate -radix hexadecimal -childformat {{/tb_cpu/DUT/theCPU/theCPU/cpu_c/invalidate.fetch -radix hexadecimal} {/tb_cpu/DUT/theCPU/theCPU/cpu_c/invalidate.id -radix hexadecimal} {/tb_cpu/DUT/theCPU/theCPU/cpu_c/invalidate.exec -radix hexadecimal} {/tb_cpu/DUT/theCPU/theCPU/cpu_c/invalidate.mem -radix hexadecimal} {/tb_cpu/DUT/theCPU/theCPU/cpu_c/invalidate.wb -radix hexadecimal}} -expand -subitemconfig {/tb_cpu/DUT/theCPU/theCPU/cpu_c/invalidate.fetch {-height 16 -radix hexadecimal} /tb_cpu/DUT/theCPU/theCPU/cpu_c/invalidate.id {-height 16 -radix hexadecimal} /tb_cpu/DUT/theCPU/theCPU/cpu_c/invalidate.exec {-height 16 -radix hexadecimal} /tb_cpu/DUT/theCPU/theCPU/cpu_c/invalidate.mem {-height 16 -radix hexadecimal} /tb_cpu/DUT/theCPU/theCPU/cpu_c/invalidate.wb {-height 16 -radix hexadecimal}} /tb_cpu/DUT/theCPU/theCPU/cpu_c/invalidate
add wave -noupdate -radix hexadecimal -childformat {{/tb_cpu/DUT/theCPU/theCPU/instructionCache.addr -radix hexadecimal} {/tb_cpu/DUT/theCPU/theCPU/instructionCache.wData -radix hexadecimal} {/tb_cpu/DUT/theCPU/theCPU/instructionCache.rData -radix hexadecimal} {/tb_cpu/DUT/theCPU/theCPU/instructionCache.wEN -radix hexadecimal} {/tb_cpu/DUT/theCPU/theCPU/instructionCache.rEN -radix hexadecimal} {/tb_cpu/DUT/theCPU/theCPU/instructionCache.stall -radix hexadecimal}} -expand -subitemconfig {/tb_cpu/DUT/theCPU/theCPU/instructionCache.addr {-height 16 -radix hexadecimal} /tb_cpu/DUT/theCPU/theCPU/instructionCache.wData {-height 16 -radix hexadecimal} /tb_cpu/DUT/theCPU/theCPU/instructionCache.rData {-height 16 -radix hexadecimal} /tb_cpu/DUT/theCPU/theCPU/instructionCache.wEN {-height 16 -radix hexadecimal} /tb_cpu/DUT/theCPU/theCPU/instructionCache.rEN {-height 16 -radix hexadecimal} /tb_cpu/DUT/theCPU/theCPU/instructionCache.stall {-height 16 -radix hexadecimal}} /tb_cpu/DUT/theCPU/theCPU/instructionCache
add wave -noupdate -expand /tb_cpu/DUT/theCPU/theCPU/iCntrl
add wave -noupdate -expand /tb_cpu/DUT/theCPU/theCPU/iMem
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/dataCache
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/cpu_c/id
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/cpu_c/exec
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/cpu_c/destination
add wave -noupdate -divider fetch
add wave -noupdate -radix hexadecimal -childformat {{/tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(31) -radix hexadecimal} {/tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(30) -radix hexadecimal} {/tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(29) -radix hexadecimal} {/tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(28) -radix hexadecimal} {/tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(27) -radix hexadecimal} {/tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(26) -radix hexadecimal} {/tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(25) -radix hexadecimal} {/tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(24) -radix hexadecimal} {/tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(23) -radix hexadecimal} {/tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(22) -radix hexadecimal} {/tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(21) -radix hexadecimal} {/tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(20) -radix hexadecimal} {/tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(19) -radix hexadecimal} {/tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(18) -radix hexadecimal} {/tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(17) -radix hexadecimal} {/tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(16) -radix hexadecimal} {/tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(15) -radix hexadecimal} {/tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(14) -radix hexadecimal} {/tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(13) -radix hexadecimal} {/tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(12) -radix hexadecimal} {/tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(11) -radix hexadecimal} {/tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(10) -radix hexadecimal} {/tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(9) -radix hexadecimal} {/tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(8) -radix hexadecimal} {/tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(7) -radix hexadecimal} {/tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(6) -radix hexadecimal} {/tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(5) -radix hexadecimal} {/tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(4) -radix hexadecimal} {/tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(3) -radix hexadecimal} {/tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(2) -radix hexadecimal} {/tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(1) -radix hexadecimal} {/tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(0) -radix hexadecimal}} -subitemconfig {/tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(31) {-height 16 -radix hexadecimal} /tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(30) {-height 16 -radix hexadecimal} /tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(29) {-height 16 -radix hexadecimal} /tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(28) {-height 16 -radix hexadecimal} /tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(27) {-height 16 -radix hexadecimal} /tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(26) {-height 16 -radix hexadecimal} /tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(25) {-height 16 -radix hexadecimal} /tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(24) {-height 16 -radix hexadecimal} /tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(23) {-height 16 -radix hexadecimal} /tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(22) {-height 16 -radix hexadecimal} /tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(21) {-height 16 -radix hexadecimal} /tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(20) {-height 16 -radix hexadecimal} /tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(19) {-height 16 -radix hexadecimal} /tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(18) {-height 16 -radix hexadecimal} /tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(17) {-height 16 -radix hexadecimal} /tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(16) {-height 16 -radix hexadecimal} /tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(15) {-height 16 -radix hexadecimal} /tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(14) {-height 16 -radix hexadecimal} /tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(13) {-height 16 -radix hexadecimal} /tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(12) {-height 16 -radix hexadecimal} /tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(11) {-height 16 -radix hexadecimal} /tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(10) {-height 16 -radix hexadecimal} /tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(9) {-height 16 -radix hexadecimal} /tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(8) {-height 16 -radix hexadecimal} /tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(7) {-height 16 -radix hexadecimal} /tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(6) {-height 16 -radix hexadecimal} /tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(5) {-height 16 -radix hexadecimal} /tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(4) {-height 16 -radix hexadecimal} /tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(3) {-height 16 -radix hexadecimal} /tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(2) {-height 16 -radix hexadecimal} /tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(1) {-height 16 -radix hexadecimal} /tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout(0) {-height 16 -radix hexadecimal}} /tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/pcout
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/cpu_c/fetch_c/nPC
add wave -noupdate -divider id
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/cpu_c/id_c/rt
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/cpu_c/id_c/rs
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/cpu_c/id_c/rd
add wave -noupdate -divider forwarding
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/forw_c/forwardOut
add wave -noupdate -radix hexadecimal /tb_cpu/DUT/theCPU/theCPU/forw_c/forwardIn
TreeUpdate [SetDefaultTree]
WaveRestoreCursors {{Cursor 1} {214 ns} 0}
configure wave -namecolwidth 348
configure wave -valuecolwidth 100
configure wave -justifyvalue left
configure wave -signalnamewidth 1
configure wave -snapdistance 10
configure wave -datasetprefix 0
configure wave -rowmargin 4
configure wave -childrowmargin 2
configure wave -gridoffset 0
configure wave -gridperiod 1
configure wave -griddelta 40
configure wave -timeline 0
configure wave -timelineunits ns
update
WaveRestoreZoom {0 ns} {1246 ns}
